Semiconductor miniaturisation has followed a trajectory

Position 1: These innovations suggest that, although classical scaling is nearing its physical limits, the semiconductor industry retains significant avenues for continued advancement.

Position 2: For decades, manufacturers achieved this by shrinking transistor gate lengths, moving from micrometer-scale features in the 1970s to the sub-five-nanometre nodes available today.

Position 3: Engineers are therefore exploring alternative architectures such as gate-all-around nanosheets and three-dimensional chip stacking to sustain performance gains without further planar shrinkage.

Position 4: Semiconductor miniaturisation has followed a trajectory broadly described by Moore's Law, which predicted that transistor density on integrated circuits would double approximately every two years.

Position 5: However, as transistors approach atomic dimensions, quantum tunnelling effects cause leakage currents that undermine switching efficiency and generate excess heat.